The present invention relates to a semiconductor device and a method for fabricating the same, and more particularly, to a semiconductor device that stably ensures an area of a storage node contact connected to a junction region in an active region of the semiconductor device and is thus able to improve the electrical properties of the semiconductor device and enhance a yield, and a method for fabricating the same.
The size of a semiconductor wafer has continually increased due to the high integration of a semiconductor device and cost reduction. In addition, the size of a cell transistor is continually miniaturized to increase the degree of integration of the semiconductor device.
The first step in achieving a higher degree of integration of a semiconductor device is the reduction of the critical dimension of a circuit pattern for the semiconductor device. It is also necessary to ensure stable contact between a lower pattern and an upper pattern of the semiconductor device. This reduces a contact resistance between the lower pattern and the upper pattern and allows for a highly reliable semiconductor device capable of operating at high speeds.
Meanwhile, when a design rule decreases according to the miniaturization of a semiconductor device, the area of a storage node contact region that connects to a capacitor, i.e., a data storage with a junction region of a lower semiconductor substrate, is also reduced.
The reduction of the storage node contact region increases a resistance against electric signal transfer and lowers a refresh property of the cell transistor due to the formation of an abnormal storage node contact. As a result, a yield is reduced and the operating speed of the semiconductor device is lowered.